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IMSAI MPU-85

Introduction by Robert Weatherford

IMSAI MPU-85 Rev 1The IMSAI MPU-85 was the brainchild of Thomas “Todd” Fischer, who purchased the rights to the IMSAI trademarks when IMSAI went out of business in 1979. Todd wanted a simple 8085 processor board that was completely interchangable with the 8080-based MPU-A. To the best of my recollection, his requirements were:

  • It had to the simplistic look of the MPU-A. No 20-pin parts.
  • No programmed parts such as EPROMs, PROMs, or PALs.
  • It must have a DIP switch selectable power-on-jump.
  • It had to work with the CP-A (front panel).
  • It had to work with the PIC-8. The MPU-B would not.
  • It had to work with the rest of the existing IMSAI product line.

I was quick to let him know that yes, I could do this. I had just moved to Dallas from the San Francisco Bay Area to start a new career at Mostek. I could not resist the opportunity to do another S-100 project!

I am going to jump to the end of this story now, and then circle back to fill in a few details. In short, the project was a failure. It was the second-biggest fail in my career (I will provide a link here to the #1 fail in due time). I built a wire-wrap prototype and tested it on my own system, but I had no PIC-8 nor front panel to test with. I incorrectly assumed that I had done enough timing analysis that the risk was small. I was paid for the project and Todd got nothing useful in return. I still feel badly about that.

So why did it fail? Many reasons, overly-ambitious design, not enough testing, and physical separation between contractor and owner. I think the best way to know for sure is to design its successor. That is what I’m planning on doing. While I can never repay Todd for the lost opportunity cost, the least I can do is to direct all net profits from the sale of the successor board to his new company, the Thomas Fischer Company. To make this a more likely success, I am going to tweak the original requirements as follows:

  • Use any size DIP parts to make more room on the board for new add-on features.
  • Make the board configurable to be fully IEEE 696-compliant. It is MPU-A compliant by default.
  • Make the power-on-jump a full 24-bits (16-bits for the basic board). Many controller board’s boot entry point is not on a page boundary (such as the VIO monitor at F806.
  • Replace the 2MHz clock generator with a dedicated oscillator in place of the jumper area 1 (selectable divide-by 1, 1.5, 2, 2.5) to allow complete freedom to choose an overclock 8085A crystal. Saves power and space at the same cost.
  • Generate the sSTACK signal in addition to pINTE. May optionally assign to a IEEE 696 RFU pin because IEE 696 reassigned sSTACK to be ERROR*. This is mostly for lighting up the STACK LED in the front panel. Once upon a time, Intel must have imagined a separate memory pool for the stack.

In addition to the basic board features, there will be an add-on feature:

  • Add an extended addressing bank-switcher to fully address up to 16 megabytes.

To support the bank switcher, a fully-sourced CP/M 3 MOVE module is supplied to get your system up and running with all the RAM your system has.

 


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